1. Field of the Disclosure
The present disclosure generally relates to processors and, more particularly, to suppression of dependent instructions.
2. Description of the Related Art
Processors typically enhance processing efficiency by employing out-of-order execution, whereby instructions are executed in an order different from the program order of the instructions. In replay processors, in addition to out-of-order execution, instructions may be executed speculatively based on an assumption that the memory subsystem will provide requested data prior to the execution of the instruction. For example, a speculative load instruction may be executed based on the assumption that a previous store instruction will have been completed so that the data for the load instruction is available. A scheduler in the processor schedules and tracks speculatively executed instructions. Data from a speculative load instruction may be used by other instructions to perform other operations. The load instruction may be referred to herein as the “parent instruction” and the other instructions that use data from the speculative load instruction are referred to herein as “dependent instructions” or alternatively, “child instructions.” Multiple levels of dependency may be present in that a particular parent instruction may have a dependent child instruction, and the child instruction may have its own dependent instruction(s).
A speculatively executed load instruction may generate invalid results due to a load failure, for example, because the memory subsystem is not ready to provide the data for the load. In response to identifying the invalid status of a speculatively executed instruction, the scheduler may replay or reissue the instruction with the invalid status and any of its dependents that had also been speculatively executed so that they can be executed with the correct operand data. Because the scheduler speculatively issues instructions that span multiple levels of dependency, the number of instructions subject to replay may be significant, and thus negatively impact performance and power consumption at the processor.
The use of the same reference symbols in different drawings indicates similar or identical items.